Low-ripple PFM Buck Converter Employing Background Calibration
Khalil, Mahmoud A.; Hegazi, Emad; El-Nozahi, Mohamed;
Abstract
This paper presents a background calibration technique to adapt the inductor peak current of Pulse Frequency Modulation (PFM) buck converters across different load, supply and external components values. The design minimizes the idle-state time and achieves high power efficiency results while sustaining Discontinuous Conduction Mode (DCM) operation. The proposed feedback circuit compares the idle-state time to a reference idle time and updates inductor peak current value in the next switching cycle using simple logic. A replica circuit matched to the PMOS switch is introduced to generate a constant inductor peak current regardless inductance, input and output voltage values. The design is implemented in UMC130nm technology from a 1.4V to 3.6V input supply. This regulator handles a wider inductor values from 1μH to 4.7μH while ensuring efficiency above 88%. The voltage ripple magnitude is minimized across all the load range from 5mA to 100mA while its variations are 70% lower than the other conventional techniques.
Other data
Title | Low-ripple PFM Buck Converter Employing Background Calibration | Authors | Khalil, Mahmoud A.; Hegazi, Emad ; El-Nozahi, Mohamed | Keywords | Low-noise DCM buck converter;Integrated switching regulator;pulse frequency modulation DC-DC converter | Issue Date | 26-Apr-2018 | Publisher | IEEE | Journal | Proceedings - IEEE International Symposium on Circuits and Systems | ISBN | 9781538648810 | ISSN | 02714310 | DOI | 10.1109/ISCAS.2018.8351256 | Scopus ID | 2-s2.0-85057117866 | Web of science ID | WOS:000451218701158 |
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